发明名称 |
SEMICONDUCTOR INGEGRATED CIRCUIT DEVICE |
摘要 |
PURPOSE:To suppress latch-up and improve the reliability of a CMOS circuit by providing a guard ring layer in order to approach the potential of a P well layer or substrate to cathode or anode. |
申请公布号 |
JPS5357775(A) |
申请公布日期 |
1978.05.25 |
申请号 |
JP19760132803 |
申请日期 |
1976.11.04 |
申请人 |
MITSUBISHI ELECTRIC CORP |
发明人 |
KIYOUMASU MIKIO;ARAKI TOSHIYUKI;YOSHIHARA TSUTOMU |
分类号 |
H01L27/08;H01L27/092;H01L29/78 |
主分类号 |
H01L27/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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