摘要 |
A semiconductor device includes a first semiconductor substrate, a second semiconductor substrate, a first main surface side of the first semiconductor substrate and a first main surface side of the second semiconductor substrate being bonded to each other; and a warpage correction layer which is formed on at least one or more selected from the first main surface side of the first semiconductor substrate, the first main surface side of the second semiconductor substrate, a second main surface side of the first semiconductor substrate, and a second main surface side of the second semiconductor substrate. |
主权项 |
1. A semiconductor device comprising:
a first semiconductor substrate including a pixel region in which a pixel array is formed; a first wiring layer formed on a first main surface side of the first semiconductor substrate; a planarizing layer formed on the first wiring layer; a first material layer between the planarizing layer and a bonding layer; a second semiconductor substrate; a second wiring layer formed on a first main surface side of the second semiconductor substrate; a second material layer between the second wiring layer and the bonding layer, wherein the first main surface side of the first semiconductor substrate and the first main surface side of the second semiconductor substrate are bonded to face each other, wherein the first and second material layers include one or more of SiN, SiO, SiO2, SiOC, SiC, SiCN, FSG, and FTEOS, and wherein at least one of the first material layer or the second material layer is a warpage correction layer having an internal stress that is reverse to a warpage of the substrate on which the warpage correction layer is formed prior to being bonded; and a through-electrode passing through the first wiring layer formed on the first main surface side of the first semiconductor substrate, the first and second material layers, and the bonding layer, and extending to the second wiring layer formed on the first main surface side of the second semiconductor substrate, wherein the through-electrode is electrically connected to the pixel array via the first wiring layer formed on the first main surface side of the first semiconductor substrate, and the through-electrode is electrically connected to the second wiring layer formed on the first main surface side of the second semiconductor substrate. |