| 发明名称 |
Service processor patch mechanism |
| 摘要 |
A microprocessor includes a plurality of processing cores, a service processing unit and a memory accessible by both the service processing unit and the plurality of processing cores. At least one of the plurality of processing cores is configured to write a patch to the memory. The patch comprises one or more instructions to be fetched from the memory and executed by the service processing unit after written to the memory by the at least one of the plurality of processing cores. |
| 申请公布号 |
US9471133(B2) |
申请公布日期 |
2016.10.18 |
| 申请号 |
US201414281758 |
申请日期 |
2014.05.19 |
| 申请人 |
VIA TECHNOLOGIES, INC. |
发明人 |
Henry G. Glenn;Gaskins Stephan |
| 分类号 |
G06F12/08;G06F1/32;G06F1/04;G06F1/12;G06F9/30;G06F9/38;G06F9/44;G06F13/24 |
主分类号 |
G06F12/08 |
| 代理机构 |
|
代理人 |
Davis E. Alan;Huffman James W. |
| 主权项 |
1. A microprocessor, comprising:
a plurality of processing cores; a service processing unit; and a memory accessible by both the service processing unit and the plurality of processing cores; and wherein at least one of the plurality of processing cores is configured to write a patch to the memory, wherein the patch comprises one or more instructions to be fetched from the memory and executed by the service processing unit after written to the memory by the at least one of the plurality of processing cores. |
| 地址 |
New Taipei TW |
