| 摘要 |
PURPOSE:To reduce the cost, by storing the bit pattern in RAM and performing the renewal of the content of RAM at the address designated at random, in the tap control circuit of transversal type equalizer. CONSTITUTION:The amount of tap control is stored in RAM21-1-RAM21-n as the bit pattern every tap, and the content is read out in the order of designation with the readout counter 22. The write-in counter 24 produces the address signal so that the address in RAM write-in is entirely random. The coincidence circuit 25 performs designation of the write-in timing to the readout/write-in control circuit 26 when the addresses of the counters 22 and 24 are in agreement. In the control data generating circuit 27, the level judgement of the signal input is made to form the renewal control data each tap and it is inputted to RAM to designate the write-in timing to the circuit 26. When the circuit 26 receives the timing signal from the both of the circuit 25 and the circuit 27, the write-in pulse to each RAM is produced to each RAM 26. |
