| 摘要 |
PURPOSE:To enable to leave the error career, even if parity error is present in write- in data, by providing a check bit generator, parity error detector and data check bit converter. CONSTITUTION:A memory controller 6 includes a parity error detector 11, check bit generator 12 and data check bit converter 13. If the detector 11 detects no parity error relating to the data to be written in the memory 7, the check bit produced at the produce unit 12 and the data on a data line 14 become write-in data and check bit as they are without processig at the converter 13 and fed to the memory 7 on the signal line 18. On the other hand, if the parity error is detected 11, the parity error signal is outut to the converter 13 on the signal line 17, and the converter 13 converts the input data or check bit to obtain uncorrectable error and delivers it to the memory 7 via the signal line 18. That is, the presence of parity error can be left. |
