发明名称 WRITEEIN CIRCUIT FOR NONNVOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE:To obtain the memory element less in dispersion and having stable and uniform write-in and erase characteristics, by clamping the voltage on the digit lines at a voltage, through the use of two LGFETs of depletion and enhancement type. CONSTITUTION:The circuit consists of write-in selection IGFETM1, memory elements M2, M3, depletion type IGFETM4 and enhancement type IGFETM5. The drain of FETM1 is connected to the write-in power supply, the gate is to write-in signal VW, and the source is to digit line D respectively, the drains of M2, M3 are to the digit line D, the gates are to selection signals VA, VB and the sources are grounded. M4, M5 constitute the clamp circuit. Thus, write-in is made stably, the write-in and erase characteristics are uniform, and dispersion is less for the entire circuit.</p>
申请公布号 JPS5693(A) 申请公布日期 1981.01.06
申请号 JP19790075813 申请日期 1979.06.15
申请人 NIPPON ELECTRIC CO 发明人 WATANABE TAKESHI
分类号 G11C17/00;G11C16/06;G11C16/12;H01L21/8247;H01L29/788;H01L29/792 主分类号 G11C17/00
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