| 摘要 |
PURPOSE:To reduce a memorial cell area and to obtain a highly integrated memory storage and enlarged memory bit numbers by a method wherein a memory cell is consisted of a semiconductor device from the viewpoint of the principle of operation. CONSTITUTION:A control electrode 1, an insulation layer 2, the first conduction type semiconductor layer 3, the second conduction type semiconductor layer 4, having a reverse polarity to the first conduction type semiconductor layer 3, are formed londitudinally in the abovementioned order. And the surface of the first conduction type semiconductor layer 3 directly under the control electrode 1 is turned to a memory region, the lower section of the control electrode 1 on the first conduction type semiconductor layer 3 is turned to a transmission region and the second conduction type semiconductor layer 4 is turned to an information processing region. |
