发明名称 MESA TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To reduce a leak current by a method wherein in the mesa construction device which the terminal of a P-N junction is exposed at the side of an inner wall of the circular groove provided at the surface of a semiconductor substrate, the region that the same conductive type as this substrate and more higher impurity density than that is provided at the outer periphery of the said circular groove. CONSTITUTION:An SiO2 film 2 is coated on the surface of an N type Si substrate 1, a circular window is opened, together with an N<+> type circular region 4 is diffusion formed thereupon, an N<+> type collector layer 3 is also formed at the back side of a substrate 1. Next thereto, the prescribed window is opened in the film 2 encircled by the region 4, the P type base layer 5, the N type emitter layer 6 are formed by the simultaneous diffusion of Ga-As. At this time the density of Ga is lowered, the P type inversion of the layer 3 and the region 4 is prevented. Thereafter, the groove is formed by the photo etching at the contacted portion with the layer 5 within the region 4, the glass 8 is coated from side wall to the bottom to equip the electrodes to the respective layers. Thus, the leak current is also reduced even in a high pressure resistance element.
申请公布号 JPS5649531(A) 申请公布日期 1981.05.06
申请号 JP19800129290 申请日期 1980.09.19
申请人 HITACHI LTD 发明人 MISAWA YUTAKA
分类号 H01L29/73;H01L21/316;H01L21/331 主分类号 H01L29/73
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