发明名称 FM STEREO DEMODULATION CIRCUIT
摘要 PURPOSE:To make common use of terminals and to reduce the external terminals, by using the monitor terminal of a voltage controlled type oscillation circuit as the oscillation stop input terminal for the oscillation circuit, in an FM stereo demodulation circuit of PLL system. CONSTITUTION:To the monitor terminal P12 receiving the monitor signal which adjusts the free-run frequency of a voltage contrlled oscillation circuit VOC5 so that it is around 76kHz through the pickup of the output of a frequency dividing circuit 8, a voltage signal in excess of the monitor signal level is compulsively fed externally, allowing the oscillation stop of VOC5. Since the detection level of a voltage detection circuit 15 is set to a given voltage in excess of the monitor output level, the stop operation of VOC5 is not made with the monitor output.
申请公布号 JPS56116345(A) 申请公布日期 1981.09.12
申请号 JP19800019007 申请日期 1980.02.20
申请人 HITACHI LTD 发明人 WATANABE KAZUO;IENAKA MASANORI
分类号 H03D1/22;H04H40/45;H04H40/54 主分类号 H03D1/22
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