Method and circuitry for CMOS transconductor linearization

摘要

Third order distortion is reduced in a CMOS transconductor circuit that includes a first N-channel transistor and a first P-channel transistor, gates of the first N-channel transistor and the first P-channel transistor being coupled to receive an input signal. Drains of the first N-channel transistor and first P-channel transistor are coupled to an output conductor. A first degeneration resistor is coupled between a source of the first P-channel transistor and a first supply voltage and a second degeneration resistor is coupled between a source of the first N-channel transistor and a second supply voltage. A first low impedance bypass circuit is coupled between the sources of the first P-channel transistor and the first N-channel transistor. A low impedance bypass circuit re-circulates second order distortion current that is induced by second-order distortion in drain currents of the first P-channel transistor and the first N-channel transistor, through the first N-channel transistor and first P-channel transistor.

主权项

1. A CMOS (complementary metal oxide semiconductor) transconductor circuit comprising:
(a) a first CMOS inverter including a first N-channel transistor and a first P-channel transistor, gates of the first N-channel transistor and the first P-channel transistor being coupled to receive a first input signal, drains of the first N-channel transistor and first P-channel transistor being coupled to a first output conductor; (b) a first degeneration element coupled between a source of the first P-channel transistor and a first supply voltage and a second degeneration element coupled between a source of the first N-channel transistor and a second supply voltage; and (c) a first low impedance bypass circuit coupled between the sources of the first P-channel transistor and the first N-channel transistor to provide a first low impedance bypass path to re-circulate second order distortion current induced by second-order distortion current in drain currents of the first P-channel transistor and the first N-channel transistor through the first P-channel transistor and the first N-channel transistor to reduce an amount of the third order distortion current flowing to a load through the first output conductor.