| 摘要 |
PURPOSE:To prevent an out-of-frame state by acquiring synchronism when a synchronizing pattern is received completely, by permitting an error up to (n) bits after the acquition of synchronism, and by performing gate operation at the bit position where a PN (pseudo noise) code is generated for some time as the patterns become asychronous. CONSTITUTION:In an out-of-phase state, output Q' of synchronizing flag circuit 10 is held at ''0'' and when the received data of shift register 1 agrees with the PN code of ROM2, the output of adder 4 which adds the coincidence output is at ''0'', so that synchronism will be acquired with the output of comparator 5. In the acquition of synchronism, output Q' of synchronizing flag circuit 10 is at ''1'' and the output of adder 4 is at ''1'', namely, an error is permitted up to one bit. Monostable multivibrator 9, on the other hand, is that generating a longer output than two frames and unless PC codes are received accurately by two continuous frames, they are not considered to be in an out-of-synchronism state, thereby improving the frame error ratio. |
