| 摘要 |
PURPOSE:To enable the time assignment according to the operating state of system, by providing the means to enable a plurality of time assignments in a given periodic time with one of a plurality of processors. CONSTITUTION:The time periodic data 20 is set to the counter 18 from the controller 14, and the address of a plurality of data processing sections is written in RAM21 of the time assignment circuit 15 from the device 14 in synchronizing with an arbitrary period. If a plurality of time assignments are required to one data processing section, the designation address of RAM21 written in the time slot memory 22 is read out, and the result is used for the time assignment of the data processing section 16. The clock of the counter 18 is given to the line number maintenance memory 23 of a plurality of processing sections 16 and operated in synchronizing with RAM21 and the memory 22. The memory 23 is written in multiplex according to the speed of line, and it is read out suitable to the line speed and given to the address of the line control memory 24. The address content is given to the line corresponding section 17 in synchronizing with the time from the circuit 15. |
