发明名称 PARALLEL SYSTEM OF ARITHMETIC DEVICE
摘要 PURPOSE:To evade the stop of control functions due to a fault of one arithmetic device, by continuing control by supplying normal arithmetic results to a controlled system as far as the other arithmetic device is normal. CONSTITUTION:If an arithmetic device 1A in the A series of a parallel system gets out of order, its arithmetic results is stopped by an output discriminator 4A from being inputted to an output device 5. Therefore, the output device 5 which ORs the arithmetic results that have been judged to be correct or incorrect supplies the normal arithmetic results of an arithmetic device 1B in the B series inputted via an output discriminator 4B to a controlled system 73. Similarly, when the arithmetic device 1A in the A series is normal and the arithmetic device 1B in the B series is troubled, the normal arithmetic results of the A-series arithmetic device 1A are supplied to the controlled system 3.
申请公布号 JPS5723152(A) 申请公布日期 1982.02.06
申请号 JP19800098531 申请日期 1980.07.17
申请人 MITSUBISHI ELECTRIC CORP 发明人 TAKEDA KUNIYOSHI;NAKAMURA MASANORI
分类号 G05B9/03;G06F11/18 主分类号 G05B9/03
代理机构 代理人
主权项
地址