发明名称 CHARACTER PATTERN INFORMATION INPUT CIRCUIT
摘要 PURPOSE:To prevent the malfunction for generation of a reset signal, by operating a control means in accordance with the reset signal, which is obtained from the bit synchronizing signal of character pattern information, to control the input of character pattern information to a series-parallel conversion means. CONSTITUTION:An FF circuit 22 generates a gate signal E, by which character pattern information is inputted to a series-parallel converting circuit 6 through a gate circuit 21, from the Q terminal by a reset signal C from a reset pulse generating circuit 2 connected to the S terminal and a set signal D, which is generated by detecting the horizontal synchronizing signal after the arrival of character pattern information, from a control signal generating circuit 9 connected to the R terminal. As the result, the gate circuit 21 is conductive to pass character pattern information from a waveform shaping circuit 1 through, and this information is inputted to the series-parallel converting circuit 6. Since character pattern information is applied to the series-parallel converting circuit 6 by the generation of the reset signal obtained by detecting a bit synchronizing signal RI, the input of the bit synchronizing signal before the generation of the reset signal is stopped.
申请公布号 JPS5780884(A) 申请公布日期 1982.05.20
申请号 JP19800155896 申请日期 1980.11.07
申请人 HITACHI SEISAKUSHO KK 发明人 HIRAMATSU KIYOSHI;OOTA MASUTOMI
分类号 H04N7/025;H04N7/03;H04N7/035;H04N7/08;H04N7/081;H04N7/083;H04N7/087;H04N7/088;(IPC1-7):04N7/08 主分类号 H04N7/025
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