| 摘要 |
PURPOSE:To reduce the load time of an initial microprogram, by providing an FF of 1 bit in a controller controlling a plurality of channels and enabling scanning operation to all channels when the FF is set to 1. CONSTITUTION:When a bit b0 of a scanning address is 0, b1-b7 correspond to a register address in a channel CH controller, when b0 is 1, b1 and b2 correspond to a CH address and b3-b7 correspond to a register address in the CH. In scanning to a specific CH by a support device, 0 is scanned in to an FF20, 1 is given to signal lines 101 and 102 in the bits b0 and the address of the specific CH is given to the signal lines 101 and 102 in the bits b1 and b2. A decoder 10 makes the output corresponding to the signals 101-102 to 1 and instructs the scanning operation to CHs 0-3 via output lines 400-403 of corresponding AND circuits 40-43. The all CHs enable the scanning operation independently of the signal lines 101 and 102 by scanning the FF20 to 1. |
