发明名称 ANALOG-TO-DIGITAL CONVERTER
摘要 PURPOSE:To simplify the constitution of an A/D converter and to process an input having a high changing speed in a short time to deliver correct data, by using an adder and a register in place of a counter of a parallel comparison type A/D converter. CONSTITUTION:An analog input signal A is fed to a subtractor 15, and an output signal B obtained by subtracting the output value of a D/A converter 14 is supplied to an A/D converter 11. The output of the converter 11 is added with the data of a register 13 which holds the output of an adder 12 through the adder 12. The timing with which the output data of the adder 12 is set to the register 13 is indicated by a timing signal 16. Then the signal output held at the register 13 is converted into an analog signal through the converter 14 to be applied to the subtractor 15. The A/D converter of such constitution does not deliver conversion data 17 for an initial certain period of time and then delivers the data 17 after the converting action follows the analog input. Thus an input having a high changing speed is processed in a short time, and the correct data 17 is delivered.
申请公布号 JPS57203329(A) 申请公布日期 1982.12.13
申请号 JP19810087497 申请日期 1981.06.09
申请人 TOKYO SHIBAURA DENKI KK 发明人 SHIOZAWA MASAO
分类号 H03M3/02;H03M1/12 主分类号 H03M3/02
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