发明名称 FREQUENCY MULTIPLIER
摘要 PURPOSE:To reduce jitters of a reproduced carrier wave, by setting a multiplier at the input side of a nonlinear element in order to multiply an input m-phase PSK wave by a rectified cosine waveform using the symbol time of said PSK wave as its half period, and then to have m-multiplication by the nonlinear element. CONSTITUTION:The phase transition of m-phase shift keying PSK of a multiplier 6 is shown by the vector of a product of 4-phase PSK wave and a shaped waveform (dospit/T)<m> in the case of m=4. When an input PSK wave 1' changes to 1 from 0, the output of the multiplier 6 does not shift directly to 1 from 0 but shifts to 1 after once shifting to the original point from 0. Therefore the phase jitters are not virtually included to a reproduced carrier wave 2' of m- multiplication for the output of a nonlinear element 3'. Thus the self-noise produced here are substantially equal to AM noises and can be eliminated by setting an amplitude limiter at the output side of the wave 2'.
申请公布号 JPS5875356(A) 申请公布日期 1983.05.07
申请号 JP19810173910 申请日期 1981.10.29
申请人 MITSUBISHI DENKI KK 发明人 FUJINO TADASHI
分类号 H04L27/227 主分类号 H04L27/227
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