| 摘要 |
PURPOSE:To increase the speed of execution and at the same time to decrease the number of decoding lines, by setting the number of stages of a register constituting a Q register group equal to the largest number of contents of a memory required for an execution state and at the same time varying the number of bits which are decoded at a control part. CONSTITUTION:A program 2 applies an address signal 3 to a program memory 1 which stores an instruction. The contents 4 read out of the memory 1 are stored temporarily in a Q register 5. The number of registers constituting the register 5 is set equal to the maximum number of contents of the memory 1 which are used in an execution state. A Q control part 10 delivers an increment signal 11 to a program counter 2 to increase the contents of the counter 2 by one and at the same time applies a writing signal 12 to the register 5. A control part 14 uses an instruction register 7, state counter 13 and a Q status signal 15 as the inputs and then decodes or encodes these inputs properly to deliver a control signal 16. |
