发明名称 LOGICAL OPERATING SYSTEM
摘要 PURPOSE:To obtain a logical product or logical sum without changing a program, by providing an area representing the distinction of input/output data, presence of inversion, and location of address and bit, in one unit of a logical operation table. CONSTITUTION:A logical operation table is provided with a bit location area 1 of input/output data, an area 2 representing the distinction of input/output, an area 3 representing the presence of inversion of input/output data, and an area 4 representing the memory address of input/output data. A program discriminates whether an input data n1 of a bit location c1 of an input data of a memory address b1 is 1 or 0, when 0, whether an input data n2 of an address b2 is 1 or 0 is discriminated. When n1 is 1, no discrimination is done. When either of n1, n2 is 1, it is transferred to a bit location c3 of the output data of a memory address b3 as it is, and when 0, it is transferred as it is similarly. The operation equivalent to the logical sum circuit is done without changing the program. Further, in case of logical product, the input data has only to be inverted at the area 3.
申请公布号 JPS58222344(A) 申请公布日期 1983.12.24
申请号 JP19820106377 申请日期 1982.06.21
申请人 FUJITSU KK 发明人 ISHIKAWA SETSUSHIYUU
分类号 G06F7/00;G06F7/76;H03K19/00 主分类号 G06F7/00
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