主权项 |
1. A multilevel soft switching power converter, comprising:
a direct current (DC) bus having a positive rail and a negative rail operable to have a voltage potential present across the DC bus; a pair of switching arms, each switching arm connected between the positive rail and the negative rail, each switching arm further comprising:
a first soft switch connected between the positive rail and a first intermediate connection and controlled by a first gating signal,a second soft switch connected between the first intermediate connection and a second intermediate connection and controlled by a second gating signal,a third soft switch connected between the second intermediate connection and a third intermediate connection and controlled by a third gating signal,a fourth soft switch connected between the third intermediate connection and the negative rail and controlled by a fourth gating signal,a flying capacitor connected between the first intermediate connection and the third intermediate connection, andan output terminal connected at the second intermediate connection; and a controller operable to: control each of the first soft switch, the second soft switch, the third soft switch, and the fourth soft switch in at least a first operating mode, a second operating mode, and a third operating mode, receive a command signal corresponding to a desired operation of the multilevel soft switching power converter, receive at least one first feedback signal corresponding to one of a current and a voltage present at an input to the multilevel soft switching power converter, receive at least one second feedback signal corresponding to one of a current and a voltage present at an output of the multilevel soft switching power converter, generate each of the first gating signal, the second gating signal, the third gating signal, and the fourth gating signal responsive to the command signal, the first feedback signal, and the second feedback signal, and generate the first gating signal, the second gating signal, the third gating signal, and the fourth gating signal in a first sequence in the first operating mode, a second sequence in the second operating mode, and a third sequence in the third operating mode. |