发明名称 HIGH STABILITY CLOCK SIGNAL REGENERATOR
摘要 11 "High-stability clock signal regenerator". A clock signal regenerator comprising a frequency control loop (1, 2, 3, 4) which comprises a variablefrequency clock signal generator (2) is inter alia used in digital telephone exchanges, when a local clock signal must be generated from incoming clock signals (1-1, 1-N), The clock signal regenerator comprises a very stable auxiliary signal generator (9) and a first difference signal producer (11) for determining the frequency difference between the generated clock signal and the auxiliary signal. This frequency difference is determined periodically and written into a storage device (13). In addition, the regenerator comprises a second difference signal producer (14) in which the difference is determined between a new frequency difference determined in the first difference signal producer (11) and the preceding frequency difference stored in the storage arrangement (13). After the incoming clock signals (1-1,...1-N) have dropped out the difference signal produced in the second difference signal producer (14) is applied as a control signal to the clock signal generator (2), the content of the storage device (13) not being changed. This has the advantage that the stability of the clock signal regenerator is then the same as the stability of the auxiliary signal generator.
申请公布号 AU1652283(A) 申请公布日期 1984.01.12
申请号 AU19830016522 申请日期 1983.07.04
申请人 PHILIPS: GLOEILAMPENFABRIEKEN N.V. 发明人 LEENDERT JAN HOLLAAR;HERMAN ZOETMAN;ROBERT JACQUES MARIE VERBEEK
分类号 G04G5/00;G04G7/00;H03K5/26;H03L7/00 主分类号 G04G5/00
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