发明名称 DEBUGGING DEVICE
摘要 PURPOSE:To set plural break point addresses by writing in advance a logic 1 in a break point address position of a break point memory circuit, and executing a break point when the logic 1 is read out. CONSTITUTION:In an executing state of a program, an address signal is outputted from a memory address generating circuit 4, and an access is executed to a memory circuit 5. The same address signal is impressed to a break point memory circuit 5a, too, therefore, if an output of the memory circuit 5a corresponding to an address which executes an access to the memory circuit 5 is ''1'', this signal passes through an AND gate 12, and sets a break point FF9. If an output of this FF9 is a logic ''1'', the timing stops in a timing generating circuit 3, and as a result, execution of the program stops. Since the memory circuit is used for a storage of a break point, the number of break points can be set unlimitedly.
申请公布号 JPS5987562(A) 申请公布日期 1984.05.21
申请号 JP19820199351 申请日期 1982.11.11
申请人 MITSUBISHI DENKI KK 发明人 FURUYA MUNEHISA
分类号 G06F11/28;G06F11/36 主分类号 G06F11/28
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