ADDRESS QUALIFYING DEVICE

摘要

PURPOSE:To reduce the load to be applied to the software by providing a variable length memory reference instruction to execute the multiplex address qualifying process by a single instruction and at the same time providing an address qualifying device to decode and execute the multiplex address qualification. CONSTITUTION:A variable length memory reference instruction is read out to an instruction register 8, and an address circuit 9 decides the type of address qualification in accordance with the contents of the part M of the circuit 9. Then the contents ADDR1 of a part D are stored in a memory address register 12, and the unit number 3 of an offset part is stored in an offset counter 11. Then the contents ADDR2 on a memory 14 designated by the ADDR1 are stroed in a memory data register 15 by using the ADDR1 of the register 12 as an effective address. In the same way, the value 3 of the counter 11 is subtracted by 1, and at the same time the first value 2 of the offset part of the register 8 is stored in an offset register 10. Hereafter the contents are added by registers 15 and 10 and stored repetitively to the register 12.