| 摘要 |
A digital-to-analogue converter arrangement, for digital signals in the form of a succession of m-bit digital words, includes plurality of individual (m-n)-bit digital-to-analogue converters 1-4 the outputs of which are summed 5 to provide the analogue output, means for feeding the (m-n) least significant bits of the m-bit digital words to the individual converters in parallel, means for decoding 12 the n most significant bits of the m-bit words to enable one or more of said individual converters such that when more than one converter is enabled all but one of the enabled converters are automatically set to provide a maximum analogue output, and means for modifying 6-7 the (m-n) least significant bits according to the decoding of the n most significant bits. <IMAGE> |
