| 摘要 |
PURPOSE:To ensure the effective and accurate input and output of an RAM by connecting the 1st, 2nd and 3rd control circuits so that the output clock is supplied as an input of the other side of each of said three control circuits. CONSTITUTION:A counter 20 delivers binary 2-digit signals A and B and supply them to the inputs of three NAND circuits (expressed as NAND hereafter) 21- 23, respectively. A block existing at a temporary store address of an RAM is read out to a temporary memory to be used for check of an error flag while the output D of a NAND21 is kept at ''0''. The next block is used for writing to said temporary store address while the output E of a NAND22. Then the block stored in the temporary memory is used to perform the transfer to a prescribed address of the RAM while the output F of a NAND23 is kept at ''0''. |
