发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To enable the formation on a current injected logic circuit I<2>L and a vertical P-N-P transistor or other bi-polar elements in the same chip by a method wherein the epitaxial layers are formed in a semiconductor substrate. CONSTITUTION:N<+> type buried layers 4 and 5 and the first N type epitaxial layer 2 are formed in the P type semiconductor substrate 1, a P<+> type diffused layer 7, the collector region of the vertical transistor B, being formed, and an N<+> type buried layer 8 being then formed in the part for I<2>LA formation. The second N type epitaxial layer 3 is formed; a P<+> type diffused region part of the collector region 10 of the transistor B, the injector region 11 of an I<2>LA, and the base region 12 of a reverse operation type transistor being diffusion-formed; N<+> type diffused layers being formed in the emitter region 13 of an N-P-N transistor C, the electrode part 14 of the collector region, the collector regions 15 and 16 of the reverse operation type transistor of the I<2>LA, and the electrode part 17 of the emitter region, and the emitter region 18 of a vertical type P-N-P transistor B is formed by P<+> diffusion.
申请公布号 JPS6045068(A) 申请公布日期 1985.03.11
申请号 JP19830152683 申请日期 1983.08.22
申请人 TOUKOU KK 发明人 NAKAYAMA KOUICHI
分类号 H01L21/74;H01L29/80 主分类号 H01L21/74
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