发明名称 MULTI-OUTPUT LOGIC CIRCUIT
摘要 PURPOSE:To take out plural NOR outputs to enhance the load driving capability of an NOR circuit by providing plural emitter followers in the output stage of a non-threshold logic circuit. CONSTITUTION:The non-threshold logic circuit is constituted of an input stage consisting of input transistors (Tr) Tr1-Tr3 whose collectors and emitters are connected to each other and resistances R1 and R2 which are connected to an earth point VCC and a power source voltage VEE respectively and an output stage consisting of emitter follower circuits EF1 and EF2 of TRs Tr4 and Tr5 whose bases receive the potential of a connection node (n) among the resistance R1 and collectors of Tr1-Tr3. When one of input signals Vin1-Vin3 is set to the high level, the node (n) becomes low-level, and two outputs of Tr4 and Tr5 become low-level together. All signals Vin1-Vin3 are set to the low level, the node (n) becomes high-level, and two outputs of Tr4 and Tr5 are changed to the high level, and this circuit is operated as an NOR circuit having three inputs and two outputs. Since output impedances of circuits EF1 and EF2 are low, the load driving capability is enhanced by connecting outputs to each other.
申请公布号 JPS6055726(A) 申请公布日期 1985.04.01
申请号 JP19830163148 申请日期 1983.09.07
申请人 HITACHI SEISAKUSHO KK;NIPPON DENSHIN DENWA KOSHA 发明人 USAMI MITSUO;SUZUKI MASAO;HORIGUCHI KATSUJI
分类号 H03K3/037;H03K17/12;H03K19/082;(IPC1-7):H03K19/082 主分类号 H03K3/037
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