Three-Dimensional Chip Stack and Method of Forming the Same

摘要

A three-dimensional chip stack includes a first chip bonded to a second chip to form an electrical interconnection therebetween. The bonded interconnection includes a first conductive pillar overlying a first substrate of the first chip, a second conductive pillar overlying a second substrate of the second chip, and a joint structure between the first conductive pillar and the second conductive pillar. The joint structure includes a first IMC region adjacent to the first conductive pillar, a second IMC region adjacent to the second conductive pillar, and a metallization layer between the first IMC region and the second IMC region.

主权项

1. A structure, comprising:
a first substrate and a second substrate; a first conductive pillar over the first substrate, and a second conductive pillar over the second substrate, the first substrate coupled to the second substrate through the respective conductive pillars to form a bonded interconnection therebetween; and a metallization layer between the first conductive pillar and the second conductive pillar, the metallization layer defining a first face and a second face, the bonded interconnection comprising a first joint structure between the first conductive pillar and the first face of the metallization layer, the bonded interconnection further comprising a second joint structure between the second conductive pillar and the second face of the metallization layer, wherein material of the metallization layer has a higher melting point than material of the first joint structure or material of the second joint structure.