发明名称 ANALOG-DIGITAL CONVERTER
摘要 PURPOSE:To obtain a circuit eliminating glitch to be produced at switching of polygonal lines of a ramp voltage generator by extracting a digital output corresponding to each input voltage at each register in an integration type AD converter consisting of the ramp voltage generator using polygonal lines. CONSTITUTION:In applying AD conversion by a ramp voltage V0, the ramp voltage V0 rises with a slope proportional to a current source i0 at a time t1, a counter K1 counts a clock CLK. The ramp voltage V0 rises with a slope proportional to a current source i1 from a time t4 to t5 and a counter K1 makes count by the clock CLK. The ramp voltage V0 rises with a slope proportional to a current source i2 from a time t7 to t8 finally and the counter K1 counts by using the clock CLK. Comparator groups C1, C2,...Cn compare the ramp voltage with input voltages V1, V2...Vn and when they are coincident, the content of the counter K1 is set to registers L1, L2...Ln.
申请公布号 JPS60103830(A) 申请公布日期 1985.06.08
申请号 JP19830210945 申请日期 1983.11.11
申请人 HITACHI SEISAKUSHO KK;HITACHI MEDEIKO:KK 发明人 HAYASHI SHINICHI;MAIO KENJI;MORIYA ATSUSHI
分类号 H03M1/56;H03M1/12;(IPC1-7):H03M1/56 主分类号 H03M1/56
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