| 摘要 |
PURPOSE:To attain efficient system processing by recognizing the exclusive state of a memory bus, switching selectively a memory bank during the task processing to a specific memory bank, and allowing the switched memory bank to access other task processing. CONSTITUTION:A memory bank selector 14 is selected depending on the content of output signals 2<0>-2<3> of a decoder circuit 13. The low-order 4-bit and CH of data bus information are stored in a storage circuit C of an I/O port comprising ports 10-12 at the print data transfer task. The CH is stored in a storage circuit B at the data reception task from the high-order machine. Moreover, the CH is stored in a storage circuit A at the task processing not requiring the DMA processing. A DMA control section discriminates the DMA request of each task with priority, makes a DACk signal 5 response to the circuit B and selects the circuits A-C and feeds the result to a selector 14. Thus, the RAM of the required memory bank is accessed to improve the processing efficiency at each task. |
