发明名称 PHASE LOCKED LOOP
摘要 PURPOSE:To obtain fast synchronism characteristics with a simple additional circuit by interposing a DC voltage generator and a switch between a phase comparator and a voltage-controlled oscillator. CONSTITUTION:A switch 6 sends the output of the phase comparator 1 to the LPF2 with a switch control signal 8 in the presence of an input signal 5, and a phase locked loop is formed. When the input signal is absent, on the other hand, the switch 6 sends the output signal of the reference voltage source 9 to the LPF2 with a control signal 8 and a voltage-controlled oscillator 4 outputs a constant frequency signal which is determined by the output voltage of the reference voltage source 9. Then, fast synchronism characteristics are obtained by setting the output voltage of the reference voltage source 9 so that the output signal frequency of the oscillator 5 is equal to the input signal or that an error is small. The reference voltage source is formed of a simple circuit. Thus, the fast synchronism characteristics are obtained with the simple additional circuit.
申请公布号 JPS60186115(A) 申请公布日期 1985.09.21
申请号 JP19840042529 申请日期 1984.03.06
申请人 MITSUBISHI DENKI KK 发明人 SAWADA HISASHI
分类号 H03L7/14;H03L7/10 主分类号 H03L7/14
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