| 摘要 |
PURPOSE:To prevent a first gate from faulty shapes attributable to excessive etching and thereby to protect withstand voltages from lowering by a method wherein a first gate insulating film is removed by etching only after the formation of an interlayer insulating film. CONSTITUTION:On an N type silicon substrate 11, a P<-> well layer 13, buried channel N<-> layer 18 are formed. A first gate insulating 14a is formed, and then a first gate 19 of a polycrystalline silicon film. Thermal oxidation is accomplished for the formation of an SiO2 film to cover the entire surface, which is followed by a process of anisotropic etching whereafter an SiO2 film 20a is retained to serve as an interlayer insulating film. Excessive etching is prevented at both ends of the first gate 19. In another thermal oxidation process, a second gate insulating film 21 is formed on the substrate 11 and an interlayer insulating film 22 is formed on the first gate 19. A P<+> layer 23 is formed, and then a second gate 24 of a polycrystalline silicon film. The surface is oxidized for the formation of an interlayer insulating SiO2 film 25. An N<+> layer 26 is formed, whereafter a PSG film 28, Al wiring 30, PSG film 31, Al wiring 32 are formed. |
