| 摘要 |
<p>A semiconductor memory device of multi-bit type which produces plural output signals (O1, ..., O8) corresponding to read-out data from one address at a time including memory means for storing data. In a plurality of output buffer stages for producing the output signals, the operation of the output buffer stages is based upon at least a timing signal. Means (151, ..., 158) for operating the output buffer stages have predetermined time differences. The output signals (O1, .. 08) having predetermined time differences are delivered from the output buffer stages.</p> |
