Waveguide formation using CMOS fabrication techniques

摘要

Conventional approaches to integrating waveguides within standard electronic processes typically involve using a dielectric layer, such as polysilicon, single-crystalline silicon, or silicon nitride, within the in-foundry process or depositing and patterning a dielectric layer in the backend as a post-foundry process. In the present approach, the back-end of the silicon handle is etched away after in-foundry processing to expose voids or trenches defined using standard in-foundry processing (e.g., complementary metal-oxide-semiconductor (CMOS) processing). Depositing dielectric material into a void or trench yields an optical waveguide integrated within the front-end of the wafer. For example, a shallow trench isolation (STI) layer formed in-foundry may serve as a high-resolution patterning waveguide template in a damascene process within the front end of a die or wafer. Filling the trench with a high-index dielectric material yields a waveguide that can guide visible and/or infrared light, depending on the waveguide's dimensions and refractive index contrast.

主权项

1. A semiconductor device comprising:
a silicon substrate having a front side and a back side and defining a recess extending through the silicon substrate from the back side of the silicon substrate to the front side of the silicon substrate; a dielectric layer of first dielectric material, having a first refractive index, disposed on the front side of the silicon substrate, the dielectric layer defining a trench open to the recess defined by the silicon substrate; an optical waveguide comprising a second dielectric material, having a second refractive index greater than the first refractive index, disposed within the trench; a first electronic device formed in the silicon substrate on a first side of the recess; and a second electronic device formed in the silicon substrate on a second side of the recess, wherein the optical waveguide defines an optical path between the first electronic device and the second electronic device, wherein the dielectric layer extends at least partially between the first electronic device and the second electronic device, and the optical waveguide extends at least partially along a plane containing the first electronic device and the second electronic device.