发明名称 BIAS CIRCUIT FOR FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To supply a normal bias voltage to an FET from a positive power supply or a negative power supply by providing the 1st-4th diodes with prescribed connection. CONSTITUTION:When a positive voltage is impressed to a power terminal 11, a current flows from a drain to a source of an FET 3 via a terminal 11, a diode 14 and an RF choke 7 and flows to ground through a resistor 10 and a diode 12. When a negative voltage is impressed to the power terminal 11, the current flows from the drain of the FET 3 to the source through ground, a diode 15, the RF choke 7 from the drain to the source of the FET 3 and to the power terminal 11 through the resistor 10 and a diode 13. The voltage drop across the resistor 10 is fed to a gate of the FET 3 as a gate-source voltage and a bias is applied to the FET. A high frequency signal is fed to the FET via a coupling capacitor 4 and outputted through a coupling capacitor 5. Thus, even when either the positive or the negative voltage is given to the power terminal, the current flowing direction is controlled by the diodes and a normal bias is fed to the FET.
申请公布号 JPS61294912(A) 申请公布日期 1986.12.25
申请号 JP19850135758 申请日期 1985.06.21
申请人 NEC CORP 发明人 SAIKAI TOSHIO
分类号 H03F1/30 主分类号 H03F1/30
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