| 摘要 |
PURPOSE:To prevent a latchup by separating inner cells and input/output cells by an N-type diffused layer secured to a power source potential and a P-type diffused layer secured to a ground potential. CONSTITUTION:A region which is surrounded by an N-type diffused layer 19 that contains a P-type diffused layer 20 that contains an N-type transistor region respectively belong, for example, to inner cells and input/output cells. Here, a dummy collector which is made of an N-type diffused layer 21 secured to a power source potential between the cells and a P-well layer 22 parallel to the layer 21 is formed. Accordingly, the dummy collector exists among P-N-P-N thyristor structures of a P-type diffused layer 13, an N-type substrate 11, a P-well layer 14, and an N-type diffused layer 15, a current flowing to the surface layer of the substrate 11 is absorbed to the layer 23 to hardly apply a trigger to the thyristor structure. |
