发明名称 DATA PROCESSOR
摘要 PURPOSE:To process a branch instruction within a time shorter than a generally known technique by retrieving associative memory by using the address of the branch instruction prior to the decoding of the branch instruction. CONSTITUTION:Prior to the decoding of an instruction in an instruction unit IU, branched associative memory is retrieved on the basis of an instruction address, an instruction work, the contents of an index register, and the contents of a base register. When words including said contents exist, a branched instruction string in the words in sent to the instruction unit IU through PTI signal line. When the branch instruction is decoded in the instruction unit IU, the branched address of the instruction word is found out and sent to a main memory through an ADDR signal line. When the reading of the branched instruction string from the main memory and the execution of the branch instruction in an execution unit EU are completed, the contents of the branched associative memory are written. Since the branched associative memory is retrieved prior to the decoding of the branch instruction, the branch instruction can be processed at a high speed.
申请公布号 JPS62126442(A) 申请公布日期 1987.06.08
申请号 JP19850264917 申请日期 1985.11.27
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 SHONAI TORU;KAMATA EIKI;TAKEUCHI SHIGEO
分类号 G06F9/38 主分类号 G06F9/38
代理机构 代理人
主权项
地址