| 摘要 |
Disclosed is an improved bid control circuit for incorporation into a device on a time-shared data bus to control the sequence by which that device bids for the use of the bus. In one preferred embodiment, the bid control circuit includes a means for determining if a bid from that device to use the bus is the highest priority bid being made, a means for storing all bids other than its own bid upon the determination that its bid has the highest priority and that other devices were bidding for the bus and lost, and a means for inhibiting its own future bids until those devices having their bids stored have obtained the use of the bus subsequent to the storing operation. |
