发明名称 LRU PAGE HOLDING CIRCUIT
摘要 PURPOSE:To attain systematization of main memory referring pages with simply hardware by writing successively a referring page number to a page holding circuit. CONSTITUTION:When an LRU page holding circuit is written and initialized in the sequence of A-D, page holding circuits 10X14 are stored in the sequence of D, D, C, B and A and outputs FS0-FS4 of condition control circuits 20-24 come to be '01111'. Presently, a main memory page is presumed. to be referred in the sequence of A, C, B, C, D, B, B, A, D, A and B. When a page A is written in a page holding circuit 10, a condition flag FS0 comes to be '1', is coincident to the contents of a page holding circuit 14, and therefore, a condition flag FS4 is reset, when the condition flag FS4 comes to be '0', a load signal LE4 occurs, the contents of a page holding circuit 13 are loaded to the page holding circuit 14, and again, the condition flag FS4 comes to be '1'. After a condition flag FM3 is reset by the load signal LE4, the condition flag FS3 comes to be also '0'. Successively, among page holding circuits 10-13, the data transfer is executed.
申请公布号 JPS62151959(A) 申请公布日期 1987.07.06
申请号 JP19850294355 申请日期 1985.12.25
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TANIGAWA YUJI
分类号 G06F12/12 主分类号 G06F12/12
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