FET with air gap spacer for improved overlap capacitance

摘要

A semiconductor device and method of forming a semiconductor device including a semiconductor substrate, a gate stack extending from the semiconductor substrate, wherein the gate stack includes a gate conductor layer, and at least two gate spacers adjacent to each side of the gate stack. The semiconductor device also includes a source/drain region on each side of the spacers, wherein the source/drain regions are adjacent to the semiconductor substrate, an ILD layer adjacent to outer surfaces of the two spacers, wherein a height of the ILD layer is level with a height of the gate stack, and an air gap positioned beneath each spacer.

主权项

1. A method of forming a semiconductor device, comprising:
providing a semiconductor substrate; forming a dummy oxide layer on at least a portion of the semiconductor substrate; forming a dummy gate stack on a portion of the dummy oxide layer; forming gate spacers adjacent to the dummy gate stack; removing a portion of the dummy oxide layer on each side of the gate spacers forming a remaining portion of the dummy oxide layer positioned beneath the dummy gate stack; forming a source/drain region on each side of the gate spacers; depositing an interlayer dielectric (ILD) layer on both sides of the gate spacers; removing the dummy gate stack; removing the remaining portion of the dummy oxide layer to form an exposed surface of the semiconductor substrate, wherein the exposed surface extends below a portion of each gate spacer; applying a low-k pinched off dielectric layer to the exposed surface of the semiconductor substrate, wherein an air gap is formed between the source/drain region and the low-k pinched off dielectric layer; removing a portion of the low-k pinched off dielectric layer between the gate spacers; and forming a replacement gate stack between the gate spacers.