| 摘要 |
In the adder circuit according to the subject of the invention, the main circuit (1) does not consist of normal adder circuits, but of 6 shifter-adder circuits (12). Circuit (6) is a one-upwards shift circuit, which is combined with a straight ahead circuit. Circuit (7) is an exchange circuit, using which the relevant decimal digit is either passed on or raised by the digit 5, if it is in the lower range 0 to 4, or is either passed on or lowered by the digit 5, if it is in the upper range 5 to 9. Circuit (4) is a dual full adder to process the value 1, and circuit (5) is a dual half adder to process the value 5. <IMAGE>
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