发明名称 |
Bit pattern conversion system. |
摘要 |
<p>A bit pattern conversion system for converting the sequence of a bit pattern between a central processing unit (CPU) and a peripheral circuit (CRTC), including a data bus line (DB) connected between the central processing unit (CPU) and the peripheral circuit (CRTC), and a conversion circuit (B) provided in the peripheral circuit (CRTC) for converting the sequence of the bit pattern from a most significant bit to a least significant bit, and vice versa, in accordance with a conversion signal (S).</p> |
申请公布号 |
EP0273637(A2) |
申请公布日期 |
1988.07.06 |
申请号 |
EP19870311042 |
申请日期 |
1987.12.15 |
申请人 |
FUJITSU LIMITED;FUJITSU MICROCOMPUTER SYSTEMS LIMITED |
发明人 |
MURAKAMI, JOJI;SIBAZAKI, SYOGO;TEMPAKU, JUNYA |
分类号 |
G06F3/14;G06F7/76;(IPC1-7):G06F7/00;G06F3/153 |
主分类号 |
G06F3/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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