| 摘要 |
An electronic data storage or memory array having DC stable memory cells which utilize the principle of a unique substrate biasing mechanism, whereby a channel region defined by resistive substrate material and formed under a controlled electrode becomes "pinched off" and, in the process, so affects the DC potential at that electrode as to maintain the pinched off condition. Consequently, the memory cell becomes established in a first DC stable state ("one" state). The principle is preferbly embodied in a field effect transistor (FET), the resistive channel region being connected in a DC conductive path to a fixed resistor and a potential source. Accordingly, when appropriate signal levels representing a binary "one" are applied to word and bit lines connected to a first controlling, or gate, electrode and to a second controlling electrode, respectively, of the FET, the described pinch-off occurs, with concomitantly high resistance in the DC path, such that the potential adjacent the controlled electrode is maintained in the "one" state that was initiated by the signals on the word and bit lines. On the other hand, when signals representing a "zero" are applied to the same controlling electrodes, the resistive channel region under the controlled electrode is no longer pinched-off, whereby the memory cell becomes established in the second or "zero" DC stable state. Means for reading the stored data in the cell are integrated with the cell. |
