摘要 |
PURPOSE: To simplify configuration by integrating a logic signal generation circuit and a sequence means at one element in the form of programmable logic element and using that element as a function for the characteristics of a charge transfer device using the programming of the element. CONSTITUTION: The output of a 1st counter CH corresponds to the terminal of a string and drives a 2nd counter CV. Two binary constitutions H and V are decoded by a decoder D, and control in the positioning and move of flip- flops B1-BN is enabled. The outputs of flip-flops B1-BN form control signals #cl-ϕN for driving the charge transfer device. These control signalsϕ1-ϕN are composed of clock signals for vertical and horizontal transfer and a clock signal for setting an output stage to '0', and according to any special case, the other logic signal can be designed, as needed. Thus, a fixed sensor/defect memory unit is dispensed with.
|