Semiconductor device having a reduced parasitic capacitance and manufacturing method thereof.

摘要

A semiconductor device comprises a substrate (10), a collector region formed of an epitaxial layer (12) of a first conduction type formed on the substrate (10), a field oxide layer (14) formed on the epitaxial layer (12) so as to define a device formation zone in a device isolation manner, a recess formed in the device formation zone in alignment with an edge of the field oxide layer (14), a polycrystalline silicon layer (18) of a second conduction type opposite to the first conduction type and formed on a side wall of the recess and on the field oxide layer (14), and an base region composed of a graft base region (32) and an active base region (34). The graft base region (32) is formed of a diffused region of the second conduction type formed in the epitaxial layer (12) within the device formation zone by diffusion of impurity from the polycrystalline silicon layer (18) of the second conduction type, and the active base region (32) is formed of a doped region of the second conduction type formed integrally with the polycrystalline silicon layer (18) of the second conduction type under a bottom surface of the recess. The semiconductor device also comprises an insulating layer (20) formed to cover the polycrystalline silicon layer (18) of the second conduction type, a polycrystalline silicon layer (36) of the first conduction type formed on at least a bottom of the recess, and an emitter region (38) formed of a diffused region of the first conduction type formed in the diffused region of the second conduction type by diffusion of impurity from the polycrystalline silicon (36) layer of the first conduction type.