Arrangement for avoiding transformer saturation when operating a voltage converter

摘要

In order to avoid transformer saturation when operating a voltage converter, a circuit arrangement is described which consists of an integrator (1), two parallel analog storage devices (sample-and-hold circuits) (2, 3) connected downstream, followed by an adder (4) and then an analog storage device (5). The analog storage devices (2, 3, 5) are switched by a control mechanism (6). The signal proportional to the current through the transformer is used to form the positive and negative maximum values through the integrator (1) and to store them at the time instant of the passage of the current through zero in the analog storage devices (2, 3). In the adder (4) which is connected downstream, the stored values are added and form a value which corresponds to the assymmetry arising in the preceding period. This value is intermediately stored in the following analog storage device (5) and updated at each period. Using the content of the analog storage device (5), a control device for the converter is acted upon such that an incipient saturation in the transformer core is counteracted by shifting the triggering times of the thyristors. <IMAGE>