Circuit arrangement for battery buffering of the power supply of electrical hardware modules

摘要

In order to buffer the power supply of electrical hardware modules (RAM), especially semiconductor memories, with a main battery (HB1) and a reserve (backup) battery (RB1), a comparator (KMP) is provided which compares the voltage of the main battery (HB1) with a reference voltage (Uref) and, in the event that it is lower, adopts a switching state in which it connects the hardware module to the reserve battery (RB1). This switching state is maintained until the comparator (KMP) is reset by the pulse associated with a replacement of the main battery (HB1). The invention finds application in battery-buffered semiconductor memories. <IMAGE>