| 摘要 |
PURPOSE:To ensure the supply of a stable power by isolating a load circuit electrically when a latchup takes place in a load circuit including a CMOS device and inserting a proper impedance to a power line. CONSTITUTION:When a latchup takes place in a load circuit 17, the emitter potential of a 3rd transistor(TR) 14 is decreased by a current limiter 2 with a drooping characteristic and the emitter current is limited to a very small value. A 4th TR 15 is turned off to turn off the 3rd TR 14, thereby isolating the load circuit 17 electrically. Simultaneously a 1st TR 7 is turned off, the 2nd TR 9 is turned on and a 4th resistor 8 is inserted between the power line of the current limit 2 and an earth line. The resistance is set to a value nearly coincident with the regulate power impedance of the load circuit 17. Thus, the impedance is not largely fluctuated and stable power is supplied from a power supply 1. |
