发明名称 Semiconductor device having multiple wells for low- and high-voltage CMOS transistors
摘要 There are included: forming element isolation regions in a semiconductor substrate; introducing a first impurity of a first conductivity type, to thereby form a first well and a second well of the first conductivity type; introducing a second impurity of a second conductivity type, to thereby form a third well of the second conductivity type and introducing the second impurity into a region between the first well and the second well, to thereby form a separation well of the second conductivity type; and further introducing a third impurity of the second conductivity type into the region between the first well and the second well.
申请公布号 US9524899(B2) 申请公布日期 2016.12.20
申请号 US201414228819 申请日期 2014.03.28
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 Torii Yasunobu
分类号 H01L29/78;H01L27/092;H01L21/336;H01L29/00;H01L29/06;H01L21/761;H01L21/8238 主分类号 H01L29/78
代理机构 Westerman, Hattori, Daniels & Adrian, LLP 代理人 Westerman, Hattori, Daniels & Adrian, LLP
主权项 1. A manufacturing method of a semiconductor device comprising: forming element isolation regions demarcating element regions in a semiconductor substrate; introducing a first impurity of a first conductivity type into a first region of the semiconductor substrate to form a first well of the first conductivity type and introducing the first impurity into a second region of the semiconductor substrate to form a second well of the first conductivity type; introducing a second impurity of a second conductivity type, which is a conductivity type opposite to the first conductivity type, into a third region of the semiconductor substrate to form a third well of the second conductivity type and introducing the second impurity into a fourth region of the semiconductor substrate between the first well and the second well to form a first separation well of the second conductivity type; introducing a third impurity of the second conductivity type into the fourth region without introducing the third impurity into the third region; and forming an embedded well of the second conductivity type, which partially overlaps with the first well, the second well and the first separation well, by introducing the second impurity of the second conductivity type under the first well, the second well and the first separation well.
地址 Yokohama JP