发明名称 Matrix Multiplication with SIMD processors - achieves partic. effective, rapid operations using small block matrices with matrix multiplication control
摘要 Performing matrix multiplication using SIMD processors in which operand and results matrices are divided into small block matrices consisting of individual matrix elements processed directly by the processors involves using matrix multiplication control for the block matrices. The number of elements in a block matrix (BM) equals the number of processor elements. All block matrices are of equal size and square. Each processor element computes an element (MEC) of the results matrix (C) from each operand block matrix synchronously and in parallel. Only the elements (MEA, MEB) of two corresp. operand block matrices (A, B) are fed to the processor elements for each processing step. USE/ADVANTAGE - Method enables partic. effective rapid matrix multiplication.
申请公布号 DE4026410(A1) 申请公布日期 1992.02.27
申请号 DE19904026410 申请日期 1990.08.21
申请人 TELENORMA GMBH, 6000 FRANKFURT, DE 发明人 WEIS, PETER, DIPL.-ING., 6072 DREIEICH, DE
分类号 G06F17/16 主分类号 G06F17/16
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